A system and method of scheduling packets in a multi-threaded, multiprocessor network architecture provides enhanced speed and performance. The architecture involves a scheduler thread that transitions between queues in response to a depletion of queues by a weighted amount, a plurality of transmit threads...http://www.google.fr/patents/US20030231645?utm_source=gb-gplus-shareBrevet US20030231645 - Efficient multi-threaded multi-processor scheduling implementation
Numéro de demande: 10/170,409 Numéro de publication: US 2003/0231645 A1 Date de dépôt: 14 juin 2002 Brevet délivré: US7248594 ( Date de délivrance 24 juil. 2007)
