A memory module includes several memory devices coupled to a memory hub. The memory hub includes several link interfaces coupled to respective processors, several memory controller coupled to respective memory devices, a cross-bar switch coupling any of the link interfaces to any of the memory controllers,...http://www.google.fr/patents/US20050060600?utm_source=gb-gplus-shareBrevet US20050060600 - System and method for on-board timing margin testing of memory modules
System and method for on-board timing margin testing of memory modules
Numéro de demande: 10/660,844 Numéro de publication: US 2005/0060600 A1 Date de dépôt: 12 sept. 2003 Brevet délivré: US7310752 ( Date de délivrance 18 déc. 2007)
