A method for operating a dielectric charge trapping memory cell as described herein includes applying an initial voltage from the gate to the substrate of the memory cell for a predetermined period of time to reduce the threshold voltage of the memory cell. The method includes applying a sequence of...http://www.google.fr/patents/US7924626?utm_source=gb-gplus-shareBrevet US7924626 - Efficient erase algorithm for SONOS-type NAND flash
Efficient erase algorithm for SONOS-type NAND flash
