An interrupt controller enables multiple CPUs to control access to an increased number of interrupts. Each of a plurality of CPUs is able to block interrupts written to the interrupt controller at multiple levels. First, each CPU is able to block interrupts at the interrupt level. In other words, a CPU...http://www.google.fr/patents/US7162559?utm_source=gb-gplus-shareBrevet US7162559 - System for controlling interrupts between input/output devices and central processing units
System for controlling interrupts between input/output devices and central ...
