A semiconductor device and carrier assembly package having a silicon integrated circuit semiconductor device provided with at least three raised electrical contacts on a first surface, a device support substrate of Si.sub.3 N.sub.4 provided with a conductive metallurgy pattern on at least one surface,...http://www.google.fr/patents/UST955008?utm_source=gb-gplus-shareBrevet UST955008 - Flip chip structure including a silicon semiconductor element bonded to an Si.sub.3 N.sub.4 base substrate
Flip chip structure including a silicon semiconductor element bonded to an ...
