A semiconductor memory device includes bit lines and word lines arranged lengthwise and breadthwise, memory cells 1 capable of reading out and writing in, MOS transistors Q1 and Q2 for pre-charge, MOS transistors Q3 for short-circuiting, and transistors Q4 and Q5 for setting voltage level. The bit lines...http://www.google.fr/patents/US6018488?utm_source=gb-gplus-shareBrevet US6018488 - Semiconductor memory device and method relieving defect of semiconductor memory device
Semiconductor memory device and method relieving defect of semiconductor ...
