A plurality of addressable data storage devices are selectively directly accessed or accessed via a cache memory. Access via the cache memory uses one of a plurality of logical addresses; each of the data storage devices is represented by a plurality of the logical addresses. Each of the data storage...http://www.google.fr/patents/US4430701?utm_source=gb-gplus-shareBrevet US4430701 - Method and apparatus for a hierarchical paging storage system
Method and apparatus for a hierarchical paging storage system
