Circuitry for detecting errors in a digital bit stream comprising a succession of data blocks and wherein each data block incorporates a parity check. At an error monitoring location, a bistable device toggles in response to either a logical "1" or "0" in the bit stream. The output of the bistable device...http://www.google.fr/patents/US4507783?utm_source=gb-gplus-shareBrevet US4507783 - Error detection circuitry for digital systems