A cache coordination mechanism for a multiprocessor, shared-memory computer switches between a snooping mechanism where an individual processor unit broadcasts or multicasts cache coherence messages to each other node on the system and a directory system where the individual processor unit transmits...http://www.google.fr/patents/US6883070?utm_source=gb-gplus-shareBrevet US6883070 - Bandwidth-adaptive, hybrid, cache-coherence protocol
