A multiprocessor device includes a plurality of cache devices connected to a plurality of processors respectively, a consistency control unit connected to the plurality of cache devices, and a main memory. The cache device caches data accessed by a processor connected to the cache device, manages the...http://www.google.fr/patents/US20010039604?utm_source=gb-gplus-shareBrevet US20010039604 - Consistency control device merging updated memory blocks
Consistency control device merging updated memory blocks
Numéro de demande: 09/895,157 Numéro de publication: US 2001/0039604 A1 Date de dépôt: 2 juil. 2001 Brevet délivré: US6839810 ( Date de délivrance 4 janv. 2005)
