Specifically, a central queue based packet switch, illustratively an eight-way router, that advantageously avoids deadlock and an accompanying method for use therein. Specifically, each packet switch (25.sub.1) contains input port circuits (310) and output port circuits (380) inter-connected...http://www.google.fr/patents/US5805589?utm_source=gb-gplus-shareBrevet US5805589 - Central shared queue based time multiplexed packet switch with deadlock avoidance
Central shared queue based time multiplexed packet switch with deadlock ...
