A rounding unit for use in arithmetic processing of register floating point data. The rounding unit comprises a mantissa part register for storing the mantissa part of the floating point data, an exponent part register for storing the exponent part of the floating point data, a judging circuit for judging...http://www.google.fr/patents/US4796217?utm_source=gb-gplus-shareBrevet US4796217 - Rounding unit for use in arithmetic processing of floating point data
Rounding unit for use in arithmetic processing of floating point data