A method for addressing system latency within a network system which includes providing a network interface and moving data within each of the plurality of memory access channels independently and in parallel to and from a memory system so that one or more of the plurality of memory access channels operate...http://www.google.fr/patents/US20060221990?utm_source=gb-gplus-shareBrevet US20060221990 - Hiding system latencies in a throughput networking system
Hiding system latencies in a throughput networking system
Numéro de demande: 11/098,245 Numéro de publication: US 2006/0221990 A1 Date de dépôt: 4 avr. 2005 Brevet délivré: US7987306 ( Date de délivrance 26 juil. 2011)
