An error correction control system for a control memory generates, when an error is detected in a microinstruction read out from a control memory to a microinstruction register, a first inhibit signal for inhibiting an updating the microinstruction register, and generates a second inhibit signal at the...http://www.google.fr/patents/US4955023?utm_source=gb-gplus-shareBrevet US4955023 - Error correction control system for control memory
Error correction control system for control memory
