A floating gate electrically erasable MOS transistor comprising a silicon substrate having source and drain regions and a channel region disposed between the source region and the drain region. The source and drain regions are formed from a semiconductor material having one conductivity type, and the...http://www.google.fr/patents/US5089433?utm_source=gb-gplus-shareBrevet US5089433 - Bipolar field-effect electrically erasable programmable read only memory cell and method of manufacture
Bipolar field-effect electrically erasable programmable read only memory ...
