In a data processing system which includes a plurality of system units such as a central processing unit (CPU), main memory, and cache memory all connected in common to a system bus and communicating with each other via the system bus, and also having a private CPU-cache memory interface for permitting...http://www.google.fr/patents/US4195342?utm_source=gb-gplus-shareBrevet US4195342 - Multi-configurable cache store system
