An automated method for designing an integrated circuit layout using a computer based upon an electronic circuit description and based upon cells which are selected from a cell library, each of the cells having an associated area, comprising the steps of: (a) placing each of the cells in the integrated...http://www.google.fr/patents/US20020116685?utm_source=gb-gplus-shareBrevet US20020116685 - Timing closure methodology
Numéro de demande: 10/134,076 Numéro de publication: US 2002/0116685 A1 Date de dépôt: 24 avr. 2002 Brevet délivré: US6725438 ( Date de délivrance 20 avr. 2004)
