A fast translation look-aside buffer for translating a linear address R.sub.L =A+B to a physical address, where A and B are two N bit operands. Inputs to the translation look-aside buffer are the n highest-order bits of A and B, where n<N, and the carry-out term from the sum of the first N-n bits...http://www.google.fr/patents/US6327646?utm_source=gb-gplus-shareBrevet US6327646 - Translation look-aside buffer utilizing high-order bits for fast access
Translation look-aside buffer utilizing high-order bits for fast access
