A data processor for executing instructions using operand data stored in a main memory includes an instruction control unit having a first associative memory storing instruction read out from the main memory, and an instruction controller reading out an instruction from the first associative memory when...http://www.google.fr/patents/US4989140?utm_source=gb-gplus-shareBrevet US4989140 - Single chip pipeline data processor using instruction and operand cache memories for parallel operation of instruction control and executions unit
Single chip pipeline data processor using instruction and operand cache ...
