A computer system includes a data structure that maintains availability status for registers of a processor of the computer system, wherein the availability status indicates whether an instruction attempting to read a particular register will stall. The computer system also includes instruction decode...http://www.google.fr/patents/US6308261?utm_source=gb-gplus-shareBrevet US6308261 - Computer system having an instruction for probing memory latency
Computer system having an instruction for probing memory latency
