A field-programmable gate array (FPGA), comprising: a first FPGA tile, the first FPGA tile comprising a plurality of functional groups (FGs), a regular routing structure, and a plurality of interface groups (IGs). The plurality of FGs are arranged in rows and columns with each of the FGs being configured...http://www.google.fr/patents/US6731133?utm_source=gb-gplus-shareBrevet US6731133 - Routing structures for a tileable field-programmable gate array architecture
Routing structures for a tileable field-programmable gate array architecture
