A scalable low-latency switch extends the functionality of a multiple level minimum logic interconnect structure for usage in computers of all types, networks and communication systems. The multiple level minimum logic interconnect structure employs a data flow technique based on timing and positioning...http://www.google.fr/patents/US6289021?utm_source=gb-gplus-shareBrevet US6289021 - Scaleable low-latency switch for usage in an interconnect structure
Scaleable low-latency switch for usage in an interconnect structure
