An improved data retiming circuit which is capable of more effectively retiming an externally inputted data by using a plurality of clocks from a voltage controlled oscillator of a phase-locked loop. The circuit includes a first delay unit for increasing a rising and falling time from an externally inputted...http://www.google.fr/patents/US5886552?utm_source=gb-gplus-shareBrevet US5886552 - Data retiming circuit
