A cell of a semiconductor device is disclosed to include a diffusion level including a plurality of diffusion regions separated by inactive regions. The cell also includes a gate electrode level including a number of conductive features defined to extend in only a first parallel direction. Adjacent ones...http://www.google.fr/patents/US8129755?utm_source=gb-gplus-shareBrevet US8129755 - Integrated circuit with gate electrode level including at least four linear-shaped conductive structures of equal length and equal pitch with linear-shaped conductive structure forming one transistor
Integrated circuit with gate electrode level including at least four linear ...
