In a receive circuit within an integrated circuit device, a binary input signal is sampled in response to transitions of a sampling clock signal to generate a set of data samples. The binary input signal is additionally compared with first and second threshold levels to generate respective first and...http://www.google.fr/patents/US20060233291?utm_source=gb-gplus-shareBrevet US20060233291 - Partial response receiver with clock data recovery
Partial response receiver with clock data recovery
Numéro de demande: 11/404,502 Numéro de publication: US 2006/0233291 A1 Date de dépôt: 14 avr. 2006 Brevet délivré: US7433397 ( Date de délivrance 7 oct. 2008)
