A memory system tightly couples to a high performance microprocessor through a synchronous bus. The logic circuits included in the memory system generate a blipper pulse signal using successive transitions of clock pulse signals other than the edges used to synchronize microprocessor and memory operations....http://www.google.fr/patents/US5291580?utm_source=gb-gplus-shareBrevet US5291580 - High performance burst read data transfer operation
High performance burst read data transfer operation
