A field programmable gate array (FPGA) with a programmable function unit (PFU) that includes a look-up table (LUT) for implementing a plurality of functions including first and second RAM cells, and a programmable switching device dedicated to coupling and decoupling the RAM cells. The first and second...http://www.google.fr/patents/US5559450?utm_source=gb-gplus-shareBrevet US5559450 - Field programmable gate array with multi-port RAM
