A divided-bit line type dynamic random-access memory is disclosed which has parallel main bit line pairs in each of which sub-bit line pairs are provided to be electrically parallel with each other. Parallel word lines are provided on the substrate to insulatively cross the sub-bit line pairs. Memory...http://www.google.fr/patents/US4819207?utm_source=gb-gplus-shareBrevet US4819207 - High-speed refreshing rechnique for highly-integrated random-access memory
High-speed refreshing rechnique for highly-integrated random-access memory
