In a cache memory setup, a buffer register is provided to accommodate the data read from a data memory. Between the buffer register and the data memory is connected a selector. This selector selectively transfers to the buffer register part of the data read from the data memory. The remaining part of...http://www.google.fr/patents/US5202969?utm_source=gb-gplus-shareBrevet US5202969 - Single-chip-cache-buffer for selectively writing write-back and exclusively writing data-block portions to main-memory based upon indication of bits and bit-strings respectively
Single-chip-cache-buffer for selectively writing write-back and exclusively ...
