A high efficiency amorphous silicon PIN semiconductor device having partially crystallized (microcrystalline) P and N layers is constructed by the sequential sputtering of N, I and P layers and at least one semi-transparent ohmic electrode. The method of construction produces a PIN device, exhibiting...http://www.google.fr/patents/US4528082?utm_source=gb-gplus-shareBrevet US4528082 - Method for sputtering a PIN amorphous silicon semi-conductor device having partially crystallized P and N-layers
Method for sputtering a PIN amorphous silicon semi-conductor device having ...
