In a system which emulates execution of source CPU instructions and includes a translating unit (translator) for converting source instructions to target instructions and a target CPU instruction unit for processing and issuing translated target instructions, provision is made for accelerating instruction,...http://www.google.fr/patents/US4841476?utm_source=gb-gplus-shareBrevet US4841476 - Extended floating point operations supporting emulation of source instruction execution
Extended floating point operations supporting emulation of source ...
