A memory cell. The memory cell has a flip-flop that includes a cross-coupled pair of inverters. The inverters each include a pair of complementary, vertical transistors. A gate contact interconnects the gates of the inverters and acts as the input of the inverter. A shunt interconnects a first source/drain...http://www.google.fr/patents/US6477080?utm_source=gb-gplus-shareBrevet US6477080 - Circuits and methods for a static random access memory using vertical transistors
Circuits and methods for a static random access memory using vertical ...