A known good die is economically fabricated. A tested integrated circuit is provided which includes a die having a bonding location on an upper surface and a lead. An upper portion of the integrated circuit package is removed or ground away to expose the bonding location. The lead is removed leaving...http://www.google.fr/patents/US7174627?utm_source=gb-gplus-shareBrevet US7174627 - Method of fabricating known good dies from packaged integrated circuits
Method of fabricating known good dies from packaged integrated circuits
