Methods of enabling the validation of an integrated circuit adapted to receive one of a plurality of configuration bitstreams for a circuit design is disclosed. The method comprises analyzing a plurality of implementations for the circuit design; determining minimum timing constraints based upon all...http://www.google.fr/patents/US7810059?utm_source=gb-gplus-shareBrevet US7810059 - Methods of enabling the validation of an integrated circuit adapted to receive one of a plurality of configuration bitstreams
Methods of enabling the validation of an integrated circuit adapted to ...
