A value in a counter on a processor is incremented for occurrences of a monitored event, providing a measured value for the event. The value of the counter register for a first thread is saved responsive to a switch from the first thread to a second thread. The value is saved in an accumulator in system...http://www.google.fr/patents/US20050086028?utm_source=gb-gplus-shareBrevet US20050086028 - Method, apparatus and computer program product for efficient per thread performance information
Method, apparatus and computer program product for efficient per thread ...
Numéro de demande: 10/687,247 Numéro de publication: US 2005/0086028 A1 Date de dépôt: 16 oct. 2003 Brevet délivré: US6925424 ( Date de délivrance 2 août 2005)
