A selectable control over multiple clock frequency/voltage level combinations that can be activated in a processor. A table can be placed in hardware that defines multiple combinations of CPU clock frequency and CPU operating voltage. By placing the table in hardware, it can be assured that all the various...http://www.google.fr/patents/US20020087896?utm_source=gb-gplus-shareBrevet US20020087896 - Processor performance state control
Numéro de demande: 09/751,528 Numéro de publication: US 2002/0087896 A1 Date de dépôt: 29 déc. 2000 Brevet délivré: US6988211 ( Date de délivrance 17 janv. 2006)
