An integrated circuit device and method for synthesis of a signal having a desired frequency and low noise. The integrated circuit embodiment of the invention generally includes a phase locked loop (PLL) circuit used in conjunction with a frequency multiplier. Specifically, the integrated circuit embodiment...http://www.google.fr/patents/US6107891?utm_source=gb-gplus-shareBrevet US6107891 - Integrated circuit and method for low noise frequency synthesis
Integrated circuit and method for low noise frequency synthesis
