A method for estimating jitter in a delay locked loop is provided. The estimation is determined from a simulation that uses a representative power supply waveform having noise as an input. Further, a computer system for estimating jitter in a delay locked loop is provided. Further, a computer-readable...http://www.google.fr/patents/US6691291?utm_source=gb-gplus-shareBrevet US6691291 - Method and system for estimating jitter in a delay locked loop
Method and system for estimating jitter in a delay locked loop
