A self aligned method of forming a semiconductor memory array of floating gate memory cells in a semiconductor substrate having a plurality of spaced apart isolation regions and active regions on the substrate substantially parallel to one another in the column direction. Floating gates are formed in...http://www.google.fr/patents/US6706592?utm_source=gb-gplus-shareBrevet US6706592 - Self aligned method of forming a semiconductor array of non-volatile memory cells
Self aligned method of forming a semiconductor array of non-volatile memory ...
