Circuitry to free the core processor from performing the explicit read operation required to read data into the internal register set. The processor's register set is expanded and a "shadow register" set is provided. While the core processor is processing one event the "context" and "data" and other...http://www.google.fr/patents/US6822959?utm_source=gb-gplus-shareBrevet US6822959 - Enhancing performance by pre-fetching and caching data directly in a communication processor's register set
Enhancing performance by pre-fetching and caching data directly in a ...
