An ASIC device and method provide clock signals to load circuits having a balanced clock tree including a master clock line, for example a clock trunk or H-tree, and branched clock lines feeding the clock signals to load circuits and being balanced with respect to the delays and loads in domains of the...http://www.google.fr/patents/US6313683?utm_source=gb-gplus-shareBrevet US6313683 - Method of providing clock signals to load circuits in an ASIC device
Method of providing clock signals to load circuits in an ASIC device
