An OCN with independent logical and physical layers for enabling communication among integrated processing elements, including ports, bus gaskets and a physical layer interface. Each bus gasket includes a processor element interface and a port interface. Each processor element interface of at least two...http://www.google.fr/patents/US20040019730?utm_source=gb-gplus-shareBrevet US20040019730 - On chip network with independent logical and physical layers
On chip network with independent logical and physical layers
Numéro de demande: 10/207,588 Numéro de publication: US 2004/0019730 A1 Date de dépôt: 29 juil. 2002 Brevet délivré: US7139860 ( Date de délivrance 21 nov. 2006)
