A latch circuit is provided on the input side of write-in circuit of a semiconductor memory device which is so formed that a common data line is used for data writing-in and data reading-out. Write-in data read serially into the latch circuit in a word unit is temporarily stored and held, so that the...http://www.google.fr/patents/US4130900?utm_source=gb-gplus-shareBrevet US4130900 - Memory with common read/write data line and write-in latch circuit
Memory with common read/write data line and write-in latch circuit
