In order to establish accurate sample timing in a digital demodulator which forms part of an orthogonally multiplexed parallel data transmission system, two second-order PLLs are arranged after a demodulating section of the digital demodulator so as to receive baseband signals of corresponding pilot...http://www.google.fr/patents/US4575682?utm_source=gb-gplus-shareBrevet US4575682 - Circuit for establishing accurate sample timing
