A layout method in a layout apparatus for layout of an integrated circuit includes placing a plurality of cells at approximate positions according to the circuit data and placing the plurality of cells at specific positions according to the result of the placement of the plurality of cells at the approximate...http://www.google.fr/patents/US7512921?utm_source=gb-gplus-shareBrevet US7512921 - Method and apparatus for designing integrated circuit enabling the yield of integrated circuit to be improved by considering random errors
Method and apparatus for designing integrated circuit enabling the yield of ...
