An array of processors, each having a data input for receiving raw data, and other data input ports for receiving data for other processors of the plurality. Each processor processes data according to an algorithm programmed therein, and either passes the processed data or raw data to the other processors....http://www.google.fr/patents/US5937202?utm_source=gb-gplus-shareBrevet US5937202 - High-speed, parallel, processor architecture for front-end electronics, based on a single type of ASIC, and method use thereof
High-speed, parallel, processor architecture for front-end electronics ...
