In accordance with an embodiment of the present invention, a method for testing a multilevel memory includes: performing an erase operation to place a plurality of memory cells in an erased state; programming a state of each cell in a group of the plurality of cells to within a first range of voltages;...http://www.google.fr/patents/US6396742?utm_source=gb-gplus-shareBrevet US6396742 - Testing of multilevel semiconductor memory
