If an uncachable write from a processor 300 is held in a processor request buffer 130 when a request control circuit 180 detects that a transaction for a cachable read to the processor 300 has been issued to a system bus 400, a retry control circuit 160 requests the transaction to be retried so as to...http://www.google.fr/patents/US6697899?utm_source=gb-gplus-shareBrevet US6697899 - Bus control device allowing resources to be occupied for exclusive access
Bus control device allowing resources to be occupied for exclusive access
