Coherent accesses and updates to state shared by parallel processors, such as SIMD array processors, is made possible by the use of state elements having local memory storing the state and permitting serialisation of accesses. Operations on single or multiple items of state are perfumed by a fixed/hardwired...http://www.google.fr/patents/US20050257025?utm_source=gb-gplus-shareBrevet US20050257025 - State engine for data processor
Numéro de demande: 10/534,430 Numéro de publication: US 2005/0257025 A1 Date de dépôt: 11 nov. 2003 Brevet délivré: US7882312 ( Date de délivrance 1 févr. 2011)
