Memory access requests are successively received in a memory request queue of a memory controller. Any conflicts or potential delays between temporally proximate requests that would occur if the memory access requests were to be executed in the received order are detected, and the received order of the...http://www.google.fr/patents/US20030217239?utm_source=gb-gplus-shareBrevet US20030217239 - Out of order DRAM sequencer
Numéro de demande: 10/143,896 Numéro de publication: US 2003/0217239 A1 Date de dépôt: 14 mai 2002 Brevet délivré: US7149857 ( Date de délivrance 12 déc. 2006)
